MARC details
| 000 -LEADER |
|---|
| fixed length control field |
03388nam a2200241Ia 4500 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
NULRC |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20250520100610.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
250520s9999 xx 000 0 und d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780123838728 |
| 040 ## - CATALOGING SOURCE |
|---|
| Transcribing agency |
NULRC |
| 050 ## - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
QA 76.9.A73 .H46 2012 |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Hennessy, John L. |
| Relator term |
author |
| 245 #0 - TITLE STATEMENT |
|---|
| Title |
Computer architecture : |
| Remainder of title |
a quantitative approach / |
| Statement of responsibility, etc. |
John L. Hennessy and David A. Patterson |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
FIFTH EDITION. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Amsterdam : |
| Name of publisher, distributor, etc. |
Elsevier Science, |
| Date of publication, distribution, etc. |
c2012 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
ix, 856 pages : |
| Other physical details |
illustrations ; |
| Dimensions |
24 cm. |
| 365 ## - TRADE PRICE |
|---|
| Price amount |
USD43.83 |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Chapter 1: Fundamentals of Quantitative Design and Analysis -- Chapter 2: Memory Hierarchy Design -- Chapter 3: Instruction-Level Parallelism and Its Exploitation -- Chapter 4: Data-Level Parallelism in Vector, SIMD, and GPU Architectures -- Chapter 5: Multiprocessors and Thread-Level Parallelism -- Chapter 6: The Warehouse-Scale Computer to exploit request-level and data-level parallelism. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
Computer Architecture: A Quantitative Approach, Fifth Edition, explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book, which became a part of Intel's 2012 recommended reading list for developers, covers the revolution of mobile computing. It also highlights the two most important factors in architecture today: parallelism and memory hierarchy. This fully updated edition is comprised of six chapters that follow a consistent framework: explanation of the ideas in each chapter; a crosscutting issues section, which presents how the concepts covered in one chapter connect with those given in other chapters; a putting it all together section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. Formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability are included. The book also covers virtual machines, SRAM and DRAM technologies, and new material on Flash memory. Other topics include the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, vector architectures, multicore processors, and warehouse-scale computers (WSCs). There are updated case studies and completely new exercises. Additional reference appendices are available online. This book will be a valuable reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers. Part of Intel's 2012 Recommended Reading List for Developers Updated to cover the mobile computing revolution Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms. Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next") Includes three review appendices in the printed text. Additional reference appendices are available online. Includes updated Case Studies and completely new exercises. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
COMPUTER SOFTWARE -- DEVELOPMENT |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Patterson, David A. |
| Relator term |
co-author |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Library of Congress Classification |
| Koha item type |
Books |
